Simulation of quantization noise effects on the performance of a wireless preamble detector and demonstration of a functional FPGA prototype

• Author / Creator

  Son, Eric Tien Tze

• This thesis describes the implementation of the physical layer for an experimental low-power wireless communication device. The system utilizes differential coherent correlation and threshold-based detection to produce a robust random-access packet-based communications protocol. Prior to implementing the system in hardware, the detection algorithm was rigorously simulated with a software model in C. The simulations revealed the tradeoffs between the packet miss performance and different system parameters such as input bit precision and threshold value. Having determined a suitable configuration, the detection algorithm was implemented on an FPGA platform. The focus of the FPGA design was on throughput and resource utilization. The final system utilizes approximately 6% of the slices available on a Xilinx Virtex II XC2V8000 FPGA and has a throughput of about 5 MChips/Second.

• Subjects / Keywords

  • FPGA
  • Preamble
  • Communications

• Graduation date

  Fall 2009

• Type of Item

  Thesis

• Degree

  Master of Science

• DOI

  https://doi.org/10.7939/R32Q60

• License

  This thesis is made available by the University of Alberta Libraries with permission of the copyright owner solely for non-commercial purposes. This thesis, or any portion thereof, may not otherwise be copied or reproduced without the written consent of the copyright owner, except to the extent permitted by Canadian copyright law.