Interfacing Issues in Real-Time Digital Simulators

W. Ren, M. Sloderbeck, M. Steurer, V. Dinavahi, T. Noda, S. Filizadeh, A. R. Chevrefils, M. Matar, R. Iravani, C. Dufour, J. Belanger, M. O. Faruque, K. Strunz, and J. A. Martinez

doi:doi:10.7939/r3-hdd8-4z59

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Electrical and Computer Engineering, Department of / Journal Articles (Electrical and Computer Engineering)

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Interfacing Issues in Real-Time Digital Simulators

Author(s) / Creator(s)
- W. Ren, M. Sloderbeck, M. Steurer, V. Dinavahi, T. Noda, S. Filizadeh, A. R. Chevrefils, M. Matar, R. Iravani, C. Dufour, J. Belanger, M. O. Faruque, K. Strunz, and J. A. Martinez
Date created

2011-01-01
Subjects / Keywords
- Field-programmable gate arrays (FPGAs), hardware-in-the-loop simulation, interface algorithms, modeling, power-electronic systems, power system simulation, real-time systems.
Type of Item

Article (Published)
DOI

https://doi.org/10.7939/r3-hdd8-4z59
License

Attribution-NonCommercial-NoDerivatives 4.0 International

Language
- English