Integrated Radio Frequency Energy Harvesting System

  • Author / Creator
    Hameed, Zohaib
  • The vision of realizing Internet of Things (IoT) pervasively connecting large number of sensors and devices that can sense and communicate is particularly attractive in today's world offering a wide range of applications. The scaling of wireless sensor network to thousands or millions of nodes is currently impractical if the energy required for the operation of these sensors is supplied by the batteries. The batteries have to be periodically recharged and replaced because of their limited storage capacities and lifetimes. Energy harvesting presents a viable solution for easily powering these sensor devices. The most common sources that can be harvested are light, vibration, thermoelectric, and radio frequency (RF) energy. Scavenging ambient energy from the available radio waves commonly referred as RF energy harvesting is one of the most popular energy excavating method. RF-powered devices have to extract energy from the received RF signals with typically low power densities as the signal is attenuated because of the multipath losses in the air owing to the large operating distance between the radiating source and the sensor nodes. Although RF-to-DC conversion can be done with high efficiency at large power levels, the conversion of low power RF signals to DC power remains very inefficient due to the threshold voltage requirement of the rectifying devices, and the losses due to the leakage of the stored energy making the amount of energy harvested from RF sources often insufficient for powering wireless sensors. This research is focused on the design of an integrated energy harvesting system in CMOS technology. The main objective of the research is to improve the sensitivity and RF-to-DC power conversion efficiency (PCE) of the RF rectifiers while providing a large output voltage from low received power levels. A hybrid forward and backward threshold-voltage compensated rectifier circuit is proposed employing PMOS transistors and “n” number of NMOS transistors for an n-level compensated multi-stage rectifier eliminating the need for triple-well technology while compensating the threshold voltage of all the rectifying transistors. The proposed hybrid rectifier circuit passively lowers the threshold voltage of the rectifying devices and largely improves the sensitivity of the rectifier circuit by increasing the level of compensation which improves the forward conduction. However, reduction in the threshold voltage of the reverse biased transistors leads to increased reverse leakage current degrading the rectifier's PCE. An adaptive rectifier scheme is proposed to efficiently convert RF signals to DC voltages utilizing minimum auxiliary PMOS transistors to control the threshold voltage of the transistors in the main rectifier chain dynamically. The proposed circuit adaptively reduces the threshold voltage of the forward biased transistors to increase the harvested power and the output voltage, and increases the threshold voltage of the reverse biased transistors to reduce the leakage current to prevent the loss of previously stored energy. Design strategy to optimize the impedance matching circuit of an RF energy harvester to maximize the harvested power for a range of received power levels with known probability density distributions is presented. Optimization of the RF energy harvesting circuit results in an increased harvested power and a large PCE for a defined range of received power levels. Prototypes of the conventional, hybrid, and adaptive rectifiers are designed and fabricated in IBM's 0.13 µm CMOS technology. Off-chip impedance matching circuits are implemented on a customized printed circuit board (PCB). The proposed adaptive threshold voltage compensated rectifier circuit achieves a maximum PCE of 32% at an input power of -15 dBm (32 µW) with an output DC voltage of 3.2 V for a 1 MΩ load. At a remarkably low input power of -21.6 dBm (6.9 µW) for a 1 MΩ load, the proposed hybrid rectifier circuit produces an output voltage of 1 V and achieves a maximum PCE of 22.6% at -16.8 dBm (20.9 µW) while delivering 2.2 V to the load.

  • Subjects / Keywords
  • Graduation date
  • Type of Item
  • Degree
    Doctor of Philosophy
  • DOI
  • License
    This thesis is made available by the University of Alberta Libraries with permission of the copyright owner solely for non-commercial purposes. This thesis, or any portion thereof, may not otherwise be copied or reproduced without the written consent of the copyright owner, except to the extent permitted by Canadian copyright law.
  • Language
  • Institution
    University of Alberta
  • Degree level
  • Department
    • Department of Electrical and Computer Engineering
  • Specialization
    • Integrated Circuits and Systems
  • Supervisor / co-supervisor and their department(s)
    • Moez, Kambiz (Electrical and Computer Engineering, University of Alberta)
  • Examining committee members and their departments
    • Belostotski, Leonid (Electrical and Computer Engineering, University of Calgary)
    • Hossain, Masum (Electrical and Computer Engineering, University of Alberta)
    • Mousavi, Pedram (Mechanical Engineering, Electrical and Computer Engineering, University of Alberta)
    • Barlage, Doug (Electrical and Computer Engineering, University of Alberta)