Wafer level reliability for application specific integrated circuits

• Author / Creator

  Manning, Dwight E.

• Subjects / Keywords

  • Integrated circuits--Wafer-scale integration
  • Integrated circuits--Design and construction
  • Semiconductors--Etching--Reliability
  • Semiconductors--Failures--Testing

• Graduation date

  1992

• Type of Item

  Thesis

• Degree

  Master of Science

• DOI

  https://doi.org/10.7939/R3ZP3W480

• License

  This thesis is made available by the University of Alberta Libraries with permission of the copyright owner solely for non-commercial purposes. This thesis, or any portion thereof, may not otherwise be copied or reproduced without the written consent of the copyright owner, except to the extent permitted by Canadian copyright law.