Adaptive phase synchronization techniques for unbalanced and distorted three-phase voltage system

• Author / Creator

  Woinowsky-Krieger, Alexis

• Interfacing and operating AC power electronic systems requires rapid and accurate estimation of the phase angle of the power source, and specifically of the positive sequence of the three-phase utility grid voltage. This is needed to ensure reliable operation of the power control devices and of the resulting power flow. However, the quality of this information is undermined by various distortions and unbalanced conditions of the three-phase grid voltage. Phase estimation and power control can both be performed in real time by a DSP, but a DSP typically has limited computational resources, especially in regards to speed and memory, which motivates the search for computationally efficient algorithms to accomplish these tasks. In contrast to conventional PLL techniques, recent approaches have used adaptive amplitude estimation to enhance the acquisition of the phase information, resulting in faster response and improved performance.
  This thesis presents a novel technique to estimate the phase of the positive sequence of a three-phase voltage in the presence of frequency variations and unbalanced conditions, referred to as hybrid negative sequence adaptive synchronous amplitude estimation with PLL, or H-NSASAE-PLL. The key feature consists of a feedback structure which embeds a positive sequence PLL and an adaptive synchronous negative sequence estimator to enhance the performance of the PLL. The resulting benefits include faster estimation of the phase of the positive sequence under unbalanced conditions with zero steady state error, simplified tuning of PLL parameters to address a wide range of application requirements, robust performance with respect to distortions and PLL parameters, a structure of minimal dynamical order (fifth) to estimate the main signal parameters of interest, simplified discretization, and reduced computational costs, making the proposed technique suitable for real time execution on a DSP.
  The H-NSASAE-PLL is developed in the Matlab/Simulink environment, and a specialized test signal generator is developed to evaluate it’s performance. The overall system is executed, and experimental results are produced, in real time, on a dSPACE DS1104 controller board.

• Subjects / Keywords

  • H-NSASAE-PLL
  • PLL
  • PNSF
  • Adaptive
  • ASAE
  • Synchronization
  • Unbalance

• Graduation date

  Fall 2010

• Type of Item

  Thesis

• Degree

  Doctor of Philosophy

• DOI

  https://doi.org/10.7939/R3560G

• License

  This thesis is made available by the University of Alberta Libraries with permission of the copyright owner solely for non-commercial purposes. This thesis, or any portion thereof, may not otherwise be copied or reproduced without the written consent of the copyright owner, except to the extent permitted by Canadian copyright law.