Design and FPGA implementation of a log-domain high-speed fuzzy control system

• Author / Creator

  Razib, Md Ali

• The speed of fuzzy controllers implemented on dedicated hardware is adequate for control of any physical process, but too slow for today’s high-complexity data networks. Defuzzification has been the bottleneck for fast implementations due to the large number of computationally expensive multiplication and division operations. In this thesis, we propose a high-speed fuzzy inferential system based on log-domain arithmetic, which only requires addition and subtraction operations. The system is implemented on a Xilinx Virtex-II FPGA with a processing speed of 67.6 MFLIPS having a maximum combinational path delay of 4.2 ns. It is a clear speedup compared to the reported fastest 50 MFLIPS implementation. A pipelined version of the controller is also implemented, which achieves a speed of 248.7 MFLIPS. Although a small approximation error is introduced, software simulation and hardware implementation on FPGA confirm high similarity of the outputs for control surfaces and a number of second-order plants.

• Subjects / Keywords

  • Fuzzy controller
  • defuzzification
  • log-domain
  • FPGA

• Graduation date

  Spring 2010

• Type of Item

  Thesis

• Degree

  Master of Science

• DOI

  https://doi.org/10.7939/R3S61F

• License

  This thesis is made available by the University of Alberta Libraries with permission of the copyright owner solely for non-commercial purposes. This thesis, or any portion thereof, may not otherwise be copied or reproduced without the written consent of the copyright owner, except to the extent permitted by Canadian copyright law.