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Harmonic Mitigation of Voltage Source Converter Based High-Power Variable Frequency Drives

  • Author / Creator
    Tian, Hao
  • Voltage-Source-Converter (VSC) based high-power Variable Frequency Drives (VFDs) are widely adopted in industrial applications. To meet the grid codes and ensure the motors’ proper operation, VSC based high-power VFDs are expected to produce low harmonic distortions and resist the harmonic disturbance from the load or utility grid.This Ph.D. research focuses on harmonic mitigation of VSC based high-power VFDs. To be specific, the research includes two aspects: improving harmonic control performance for the active front end of VFD and enhancing the capacitor ripple mitigation in multilevel VFDs. For VSC based high-power VFDs, the low switching frequency, the associated large system delay, and low sampling rate can significantly affect the harmonic control performance. To improve the harmonic control performance, virtual impedance theory and feed-forward control are employed to flexibly control the VSC output current harmonics, eliminate the cascaded multiloop controllers, and obtain fast transient. Considering the effects caused by the low sampling rate and large system delay, multi-rate sampling scheme is applied to increase the sampling rate for harmonics. As the high-power VSC with multi-rate control is a time-varying system, the multi-rate modeling method is thus applied to ensure the accurate control loop analysis and design. On the other hand, the capacitor ripples can also cause output distortions in the multilevel VFDs. Some multilevel converters have difficulties in capacitor-balancing, leading to large voltage ripples and low output quality, particularly at low fundamental frequencies (low motor speed). To avoid this, the PWM methods to improve floating capacitor voltage balancing and new multilevel converter topologies suitable for high-power applications are required. A new PWM method, named Stair Edge PWM (SEPWM) method, is proposed to obtain more switching states for converters without the capability to adequately control the voltage on floating capacitors. With the proposed PWM, the floating-capacitor-based multilevel converter can produce high-quality output current and voltage with the reduced requirement on the capacitance of floating capacitors. To further improve the power quality of VFD without using complicated PWM method, a novel multilevel converter topology, named seven-level hybrid-clamped (7L-HC) converter, is proposed. The proposed topology can achieve excellent capacitor voltage balancing in a wide frequency range (from 0 Hz to 60 Hz), which is typically required for VFD systems.

  • Subjects / Keywords
  • Graduation date
    Fall 2019
  • Type of Item
    Thesis
  • Degree
    Doctor of Philosophy
  • DOI
    https://doi.org/10.7939/r3-whrk-g037
  • License
    Permission is hereby granted to the University of Alberta Libraries to reproduce single copies of this thesis and to lend or sell such copies for private, scholarly or scientific research purposes only. Where the thesis is converted to, or otherwise made available in digital form, the University of Alberta will advise potential users of the thesis of these terms. The author reserves all other publication and other rights in association with the copyright in the thesis and, except as herein before provided, neither the thesis nor any substantial portion thereof may be printed or otherwise reproduced in any material form whatsoever without the author's prior written permission.