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Device-Level Power Electronic System Emulation for Hardware-in-the-Loop Applications Open Access


Other title
Insulated gate bipolar transistor (IGBT)
Hardware-in-the-loop (HIL)
Field-programmable gate arrays (FPGAs)
Type of item
Degree grantor
University of Alberta
Author or creator
Wang, Wentao
Supervisor and department
Dinavahi, Venkata (Electrical and Computer Engineering)
Examining committee member and department
Dinavahi, Venkata (Electrical and Computer Engineering)
Barlage, Douglas (Electrical and Computer Engineering)
Liang, Hao (Electrical and Computer Engineering)
Department of Electrical and Computer Engineering
Energy systems
Date accepted
Graduation date
Master of Science
Degree level
Hardware-in-the-loop (HIL) simulators are prevalent in many industries and are playing a significant role in the design and testing of new equipment. While detailed models of power system components are available for HIL simulators, there is limited knowledge in the area of power electronic converter modeling. Currently available HIL simulators employ simpler models for power electronic converters, based on ideal or averaged switch models. While such models are adequate for system-level performance evaluation and analysis, there are seldom sufficient for the analysis of device-level stresses, electromagnetic interference (EMI), and parasitics, which are especially important at high switching frequencies. This thesis develops device-level models for power electronic converters for HIL simulation. Detailed device-level hardware models are developed for the insulated-gate bipolar transistor (IGBT) and the power diode on the field-programmable gate array (FPGA). The hardware design are fully paralleled using an IEEE 32-bit floating-point precision to achieve the lowest latencies and resource consumption. An efficient variable time-stepping algorithm is proposed for the solution of the nonlinear device equations. Case studies for DC-DC and DC-AC converters are emulated and validated, showing good agreement.
Permission is hereby granted to the University of Alberta Libraries to reproduce single copies of this thesis and to lend or sell such copies for private, scholarly or scientific research purposes only. Where the thesis is converted to, or otherwise made available in digital form, the University of Alberta will advise potential users of the thesis of these terms. The author reserves all other publication and other rights in association with the copyright in the thesis and, except as herein before provided, neither the thesis nor any substantial portion thereof may be printed or otherwise reproduced in any material form whatsoever without the author's prior written permission.
Citation for previous publication
W. Wang, Z. Shen, and V. Dinavahi, “Physics-based device-level power electronic circuit hardware emulation on FPGA”, IEEE Trans. Ind. Informat., vol. 10, no. 4, pp. 2166-2179, Nov. 2014.

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