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Subject: Digit-Serial Arithmetic

  • Digit-Online LDPC Decoding

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    Spring 2013

    Marshall, Philip A.

    Highly parallel VLSI implementations of low-density parity-check (LDPC) block code decoders have a large number of interconnections, which can result in designs with low logic density. Bit-serial architectures have been developed that reduce the number of wires needed. However, they do not...

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