Synthesis and Characterization of Approximate Circuits to Mitigate the Aging and Temperature Effects in an Advanced CMOS Technology

• Author / Creator

  Hernandez Santiago, Francisco Javier

• While the goal has been increasing performance and reducing power consumption by decreasing the transistor size, the most advanced semiconductor technologies (i.e., those with dimensions smaller than 45 nm) have become more susceptible to high temperatures and aging phenomena. As a consequence, the circuit performance (i.e., speed) is degraded significantly over time, which may lead to timing violations in the critical path delays. Designers commonly add timing margins to a circuit as guard-bands to guarantee circuit reliability during its projected lifetime. However, guard-banding significantly affects circuit performance. Many design methodologies have been investigated to mitigate the effect of guardbands, but these methodologies come at the cost of other circuit overhead, such as an extra margin in the transistor size or voltage. In contrast, the principle of approximate computing has emerged as a promising solution to improve circuit measures (including speed, power and area) by intentionally introducing controllable errors in resilient applications. Hence, our main objective is to explore how approximate arithmetic circuits can be employed to deal with circuit degradations without a loss in performance.
  The methodology presented in this thesis consists of converting degradations to deterministic and controllable errors, rather than using guard-bands to guarantee reliability. That is, an approximate circuit is characterized by considering its degradations to obtain the same performance of an accurate circuit without any degradation. Our simulation results show that the simple use of truncated arithmetic circuits leads to a higher quality loss compared to using other approximate circuits. To guarantee the same performance, for instance, Cartesian genetic programming-generated adders and lower-part OR gate-based adder result in the lowest mean relative error distances (MREDs) among all the considered approximate adders, independently of the number of years (from 1 to 10 years) or the level of temperature (from 25 ◦C to 70 ◦C) the circuit is supposed to be reliably operating. A truncated multiplier has the lowest MRED towards a reliable operation in 10 years, but the approximate multipliers with configurable error recovery are most suitable when the level of degradation is higher, e.g. at a temperature of 70 ◦C. For three different image processing applications, our conducted experiments show that guard-bands can be mitigated while maintaining an output result with good visual quality.

• Subjects / Keywords

  • high-performance circuits
  • hardware accelerators
  • Approximate computing
  • low-power circuits
  • approximate multipliers
  • approximate adders
  • semiconductor device reliability

• Graduation date

  Fall 2020

• Type of Item

  Thesis

• Degree

  Master of Science

• DOI

  https://doi.org/10.7939/r3-nbp3-0y56

• License

  Permission is hereby granted to the University of Alberta Libraries to reproduce single copies of this thesis and to lend or sell such copies for private, scholarly or scientific research purposes only. Where the thesis is converted to, or otherwise made available in digital form, the University of Alberta will advise potential users of the thesis of these terms. The author reserves all other publication and other rights in association with the copyright in the thesis and, except as herein before provided, neither the thesis nor any substantial portion thereof may be printed or otherwise reproduced in any material form whatsoever without the author's prior written permission.