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Permanent link (DOI): https://doi.org/10.7939/R3TP87

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Exploring Application-level Fault Tolerance for Robust Design Using FPGA Open Access

Descriptions

Other title
Subject/Keyword
Single Event Upset
Application-level Fault Tolerance
FPGA
Robust Design
Type of item
Thesis
Degree grantor
University of Alberta
Author or creator
Chen, Jing
Supervisor and department
Hu, Yu (Electrical and Computer Engineering)
Examining committee member and department
Han, Jie (Electrical and Computer Engineering)
Hu, Yu (Electrical and Computer Engineering)
Lin, Guohui (Computing Science)
Department
Department of Electrical and Computer Engineering
Specialization
Computer, Microelectronic Devices, Circuits and Systems
Date accepted
2012-07-20T14:50:06Z
Graduation date
2012-11
Degree
Master of Science
Degree level
Master's
Abstract
Single Event Upset has become an increasingly important issue for SRAM-based Field Programmable Gate Arrays. To mitigate these soft errors, most of existing works focused on utilizing logic-level flexibilities to improve circuit reliability. However, we notice that from an application's perspective, there exist higher-level flexibilities. This kind of application-level fault tolerance can be useful from two aspects: one is by directly modifying algorithms (algorithm-based fault tolerance), and the other is by mapping algorithm properties into logic level (algorithm-mapping fault tolerance). In this thesis, we perform two case studies to analyze the impact of both categories of application-level fault tolerance on circuit reliability, and explore their linkages to the logic-level fault tolerance. With an enhanced algorithm considering algorithm-based fault tolerance, the error rate for the matrix multiplication can be reduced by 18x. Moreover, by mapping algorithm properties into logic level, we achieve 3x improvement in circuit reliability for the discrete convolution.
Language
English
DOI
doi:10.7939/R3TP87
Rights
Permission is hereby granted to the University of Alberta Libraries to reproduce single copies of this thesis and to lend or sell such copies for private, scholarly or scientific research purposes only. Where the thesis is converted to, or otherwise made available in digital form, the University of Alberta will advise potential users of the thesis of these terms. The author reserves all other publication and other rights in association with the copyright in the thesis and, except as herein before provided, neither the thesis nor any substantial portion thereof may be printed or otherwise reproduced in any material form whatsoever without the author's prior written permission.
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